AP54RHC804ENT

Apogee Semiconductor
444-AP54RHC804ENT
AP54RHC804ENT

Mfr.:

Description:
Translation - Voltage Levels LEO 8-Ch level translator , Evaluation-Grade Flight, NiPdAu TSSOP20, packed in tape and reel

Lifecycle:
New Product:
New from this manufacturer.
ECAD Model:
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Availability

Stock:
Non-Stocked
Factory Lead Time:
6 Weeks Estimated factory production time.
Minimum: 1   Multiples: 1
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:
This Product Ships FREE

Pricing (EUR)

Qty. Unit Price
Ext. Price
110,10 € 110,10 €
92,08 € 920,80 €
84,86 € 2.121,50 €
82,65 € 8.265,00 €
500 Quote

Product Attribute Attribute Value Select Attribute
Apogee Semiconductor
Product Category: Translation - Voltage Levels
Radiation-Hardened Level Translator
CMOS
TSSOP-20
5.5 V
1.65 V
17.7 ns
- 55 C
+ 150 C
SMD/SMT
Brand: Apogee Semiconductor
Country of Assembly: Not Available
Country of Diffusion: Not Available
Country of Origin: PH
Input Type: LVCMOS
Number of Channels: 8 Channel
Operating Supply Current: 100 mA
Output Type: 3-State
Product Type: Translation - Voltage Levels
Subcategory: Logic ICs
Part # Aliases: AP54RHC804ENT-R
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Attributes selected: 0

TARIC:
8542399000
USHTS:
8542390090
ECCN:
EAR99

AP54RHC804 Translator

Apogee Semiconductor AP54RHC804 Translator is radiation-hardened by design, an 8-channel level translator with 3-state outputs and cold sparing. This translator delivers high resiliency to single-event effects (SEE) and total ionizing dose (TID) to 30 krad (Si). The AP54RHC804 translator operates across a 1.4V to 5.5V range on both of its supply voltage inputs, VCCA and VCCY. This translator offers a proprietary output stage and robust power‑on reset (POR) circuit, enabling AP54RHC804 cold-sparing in any redundant configuration with no static power loss. The AP54RHC804 translator also features a redundant output stage with high drive capability and low static power loss. Typical applications include voltage-level translation, LVCMOS FPGA I/O level translation, telemetry data interfacing, multi-voltage system-level interfacing, sensor integration, and bi-directional level shifting.